From 8fd60d09f6f0b63c1b555efbda1242fe9fa39bcc Mon Sep 17 00:00:00 2001
From: Benjamin Chausse <benjamin@chausse.xyz>
Date: Tue, 6 May 2025 12:40:25 -0400
Subject: Annex work

---
 rapport/assets/code/add1bitb.tex | 45 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 rapport/assets/code/add1bitb.tex

(limited to 'rapport/assets/code/add1bitb.tex')

diff --git a/rapport/assets/code/add1bitb.tex b/rapport/assets/code/add1bitb.tex
new file mode 100644
index 0000000..c4c48d7
--- /dev/null
+++ b/rapport/assets/code/add1bitb.tex
@@ -0,0 +1,45 @@
+\begin{verbatim}
+architecture Behavioral of Add1BitB is
+
+begin
+
+Adder: process(X, Y, Ci) is variable buf: STD_LOGIC_VECTOR(2 downto 0);
+begin
+  buf(0) := X;
+  buf(1) := Y;
+  buf(2) := Ci;
+
+  case (buf) is
+    when "000" =>
+      O  <= '0';
+      Co <= '0';
+    when "001" =>
+      O  <= '1';
+      Co <= '0';
+    when "010" =>
+      O  <= '1';
+      Co <= '0';
+    when "011" =>
+      O  <= '0';
+      Co <= '1';
+    when "100" =>
+      O  <= '1';
+      Co <= '0';
+    when "101" =>
+      O  <= '0';
+      Co <= '1';
+    when "110" =>
+      O  <= '0';
+      Co <= '1';
+    when "111" =>
+      O  <= '1';
+      Co <= '1';
+    when others =>
+      O  <= '0';
+      Co <= '0';
+  end case;
+
+end process Adder;
+
+end Behavioral;
+\end{verbatim}
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