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authorLYAM <cous5830@gmail.com>2025-05-05 11:39:31 -0400
committerLYAM <cous5830@gmail.com>2025-05-05 11:39:31 -0400
commitfae50a27219cc7747b7fd6e7d2fe74e818902e09 (patch)
tree11e6dc322dfbc01d3f5bfe59b4ae18fcabf1b33b /pb_APP_log_comb.srcs/sources_1/new/Moins_5.vhd
parent5f8e4ffb58f55719f670d48d619105ae7db6958d (diff)
parentddadb2a3375eb127fed609fe188fb6c06f7bf03c (diff)
Merge branch 'master' of git.chausse.xyz:s4-app1
Diffstat (limited to 'pb_APP_log_comb.srcs/sources_1/new/Moins_5.vhd')
-rw-r--r--pb_APP_log_comb.srcs/sources_1/new/Moins_5.vhd6
1 files changed, 3 insertions, 3 deletions
diff --git a/pb_APP_log_comb.srcs/sources_1/new/Moins_5.vhd b/pb_APP_log_comb.srcs/sources_1/new/Moins_5.vhd
index 977bac1..065bd1f 100644
--- a/pb_APP_log_comb.srcs/sources_1/new/Moins_5.vhd
+++ b/pb_APP_log_comb.srcs/sources_1/new/Moins_5.vhd
@@ -31,9 +31,9 @@ use IEEE.STD_LOGIC_1164.ALL;
--library UNISIM;
--use UNISIM.VComponents.all;
-entity Moins_5 is
- Port ( Moins5 : out STD_LOGIC_VECTOR (3 downto 0);
- ADCbin : in STD_LOGIC_VECTOR (3 downto 0));
+entity Moins_5 is Port (
+ ADCbin : in STD_LOGIC_VECTOR (3 downto 0);
+ Moins5 : out STD_LOGIC_VECTOR (3 downto 0));
end Moins_5;