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Diffstat (limited to 'rapport/annexe.tex')
| -rw-r--r-- | rapport/annexe.tex | 135 |
1 files changed, 90 insertions, 45 deletions
diff --git a/rapport/annexe.tex b/rapport/annexe.tex index 66d1e69..face98d 100644 --- a/rapport/annexe.tex +++ b/rapport/annexe.tex @@ -1,49 +1,106 @@ \newpage \appendix -\section{Code VHDL} -\todo{Finish this this} \begin{figure}[H] - \tiny - \centering - \begin{varwidth}{\linewidth} - \input{assets/code/thermo2bin.tex} - \end{varwidth} - \caption{Module Thermo2bin} + + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-bin2dualbcd.png} + \caption{graph-bin2dualbcd} + \end{subfigure} + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-bin2dualbcd-signed.png} + \caption{graph-bin2dualbcd-signed} + \end{subfigure} + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-bin2dualbcd-unsigned.png} + \caption{graph-bin2dualbcd-unsigned} + \end{subfigure} + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-dec-2-a-8.png} + \caption{graph-dec-2-a-8} + \end{subfigure} + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-moins5.png} + \caption{graph-moins5} + \end{subfigure} + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-mult-2-3.png} + \caption{graph-mult-2-3} + \end{subfigure} + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-parite-pressed.png} + \caption{graph-parite-pressed} + \end{subfigure} + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-parite-unpressed.png} + \caption{graph-parite-unpressed} + \end{subfigure} + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-mux.png} + \caption{graph-mux} + \end{subfigure} + \begin{subfigure}{.496\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-thermo2bin.png} + \caption{graph-thermo2bin} + \end{subfigure} + \caption{Chronogrames des simulations Vivado} \end{figure} \begin{figure}[H] - \tiny \centering - \begin{varwidth}{\linewidth} - \input{assets/code/add4bits.tex} - \end{varwidth} - \caption{Module Add4Bits} + \begin{subfigure}{0.60 \linewidth} + \centering + \vfill + \includegraphics[width=\textwidth]{assets/img/schematic-add1bita.png} + \caption{Add1BitA: Conception parallèle} + \end{subfigure} \hfill + \begin{subfigure}{0.39 \linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/schematic-add1bitb.png} + \caption{Conception séquentielle avec \textit{CASE}} + \end{subfigure} + \begin{subfigure}{.49\linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/graph-appcombitop.png} + \caption{graph-appcombitop} + \end{subfigure} + \caption{Additionneurs 1 bit} \end{figure} + + +\section{Code VHDL} + \begin{figure}[H] \tiny \centering \begin{varwidth}{\linewidth} - \input{assets/code/add1bita.tex} + \input{assets/code/thermo2bin.tex} \end{varwidth} - \caption{Module Add1BitA} + \caption{Module Thermo2bin} \end{figure} \begin{figure}[H] \tiny \centering \begin{varwidth}{\linewidth} - \input{assets/code/add1bitb.tex} + \input{assets/code/add4bits.tex} \end{varwidth} - \caption{Module Add1BitB} + \caption{Module Add4Bits} \end{figure} \section{Schémas Bloc} -\todo{Simulations} - - \begin{figure}[H] \centering \includegraphics[width=\textwidth]{assets/img/schematic-thermo2bin.png} @@ -58,37 +115,24 @@ \begin{figure}[H] \centering - \includegraphics[width=.6\textwidth]{assets/img/schematic-add1bita.png} - \caption{Module Add1BitA} -\end{figure} - -\begin{figure}[H] - \centering - \includegraphics[width=.6\textwidth]{assets/img/schematic-add1bitb.png} - \caption{Module Add1BitB} + \begin{subfigure}{0.60 \linewidth} + \centering + \vfill + \includegraphics[width=\textwidth]{assets/img/schematic-add1bita.png} + \caption{Add1BitA: Conception parallèle} + \end{subfigure} \hfill + \begin{subfigure}{0.39 \linewidth} + \centering + \includegraphics[width=\textwidth]{assets/img/schematic-add1bitb.png} + \caption{Conception séquentielle avec \textit{CASE}} + \end{subfigure} + \caption{Additionneurs 1 bit} \end{figure} \newpage \section{Tables de Vérité et Karnaugh} -% \begin{figure}[H] -% \centering -% \begin{karnaugh-map}[4][4][1][$D$][$C$][$B$][$A$] -% \manualterms{ -% 0,1,2,3, -% 4,5,6,7, -% 8,9,10,11, -% 12,13,14,15} -% \implicant{2}{10} -% \implicant{4}{13} -% \implicant{12}{10} -% \implicantedge{3}{2}{11}{10} -% \end{karnaugh-map} -% \caption{TEMPLATE NOT GOOD} -% \end{figure} - - \begin{table}[H] \centering \caption{Table de vérité des Bits} @@ -136,3 +180,4 @@ \caption{Karnaugh pour le bit $G$} \label{tab:karnaugh-bit-G} \end{figure} + |