summaryrefslogtreecommitdiff
path: root/pb_logique_seq.hw/hw_1/hw.xml
blob: 0c3115f38726d516967db54a32749d3548968747 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2020.2 (64-bit)                     -->
<!--                                                              -->
<!-- Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.        -->

<hwsession version="1" minor="2">
  <device name="xc7z020_1" gui_info="dashboard1=hw_ila_1[xc7z020_1/hw_ila_1/Waveform=ILA_WAVE_1;xc7z020_1/hw_ila_1/Capture Setup=ILA_CAPTURE_1;xc7z020_1/hw_ila_1/Status=ILA_STATUS_1;xc7z020_1/hw_ila_1/Trigger Setup=ILA_TRIGGER_1;xc7z020_1/hw_ila_1/Settings=ILA_SETTINGS_1;]"/>
  <ObjectList object_type="hw_device" gui_info="">
    <Object name="xc7z020_1" gui_info="">
      <Properties Property="FULL_PROBES.FILE" value="$_project_name_.runs/impl_1/circuit_tr_signal.ltx"/>
      <Properties Property="PROBES.FILE" value="$_project_name_.runs/impl_1/circuit_tr_signal.ltx"/>
      <Properties Property="PROGRAM.HW_BITSTREAM" value="$_project_name_.runs/impl_1/circuit_tr_signal.bit"/>
      <Properties Property="SLR.COUNT" value="1"/>
    </Object>
  </ObjectList>
  <ObjectList object_type="hw_ila" gui_info="">
    <Object name="design_1_i/system_ila_0/U0/ila_lib" gui_info="">
      <Properties Property="CONTROL.TRIGGER_CONDITION" value="AND"/>
      <Properties Property="CORE_REFRESH_RATE_MS" value="500"/>
    </Object>
  </ObjectList>
  <ObjectList object_type="hw_probe" gui_info="">
    <Object name="design_1_i/system_ila_0/U0/probe1_1[3:0]" gui_info="Trigger Setup=0"/>
  </ObjectList>
  <probeset name="hw project" active="false">
    <probe type="ila" busType="bus" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="CAPTURE_COMPARE_VALUE" value="eq8&apos;hXX"/>
        <Option Id="COMPARE_VALUE.0" value="eq8&apos;hXX"/>
        <Option Id="DISPLAY_AS_ENUM" value="1"/>
        <Option Id="DISPLAY_HINT" value=""/>
        <Option Id="DISPLAY_RADIX" value="HEX"/>
        <Option Id="DISPLAY_VISIBILITY" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="LINK_TO_WAVEFORM" value="1"/>
        <Option Id="MAP" value="probe0[7:0]"/>
        <Option Id="NAME.CUSTOM" value=""/>
        <Option Id="NAME.SELECT" value="Long"/>
        <Option Id="SOURCE" value="netlist"/>
        <Option Id="TRIGGER_COMPARE_VALUE" value="eq8&apos;hXX"/>
        <Option Id="WAVEFORM_STYLE" value="Digital"/>
      </probeOptions>
      <nets>
        <net name="design_1_i/system_ila_0/U0/probe0_1[7]"/>
        <net name="design_1_i/system_ila_0/U0/probe0_1[6]"/>
        <net name="design_1_i/system_ila_0/U0/probe0_1[5]"/>
        <net name="design_1_i/system_ila_0/U0/probe0_1[4]"/>
        <net name="design_1_i/system_ila_0/U0/probe0_1[3]"/>
        <net name="design_1_i/system_ila_0/U0/probe0_1[2]"/>
        <net name="design_1_i/system_ila_0/U0/probe0_1[1]"/>
        <net name="design_1_i/system_ila_0/U0/probe0_1[0]"/>
      </nets>
    </probe>
    <probe type="ila" busType="bus" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="CAPTURE_COMPARE_VALUE" value="eq4&apos;hX"/>
        <Option Id="COMPARE_VALUE.0" value="neq4&apos;h0"/>
        <Option Id="DISPLAY_AS_ENUM" value="1"/>
        <Option Id="DISPLAY_HINT" value=""/>
        <Option Id="DISPLAY_RADIX" value="HEX"/>
        <Option Id="DISPLAY_VISIBILITY" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="LINK_TO_WAVEFORM" value="1"/>
        <Option Id="MAP" value="probe1[3:0]"/>
        <Option Id="NAME.CUSTOM" value="i_btn_1"/>
        <Option Id="NAME.SELECT" value="Custom"/>
        <Option Id="SOURCE" value="netlist"/>
        <Option Id="TRIGGER_COMPARE_VALUE" value="neq4&apos;h0"/>
        <Option Id="WAVEFORM_STYLE" value="Digital"/>
      </probeOptions>
      <nets>
        <net name="design_1_i/system_ila_0/U0/probe1_1[3]"/>
        <net name="design_1_i/system_ila_0/U0/probe1_1[2]"/>
        <net name="design_1_i/system_ila_0/U0/probe1_1[1]"/>
        <net name="design_1_i/system_ila_0/U0/probe1_1[0]"/>
      </nets>
    </probe>
    <probe type="ila" busType="bus" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="CAPTURE_COMPARE_VALUE" value="eq2&apos;hX"/>
        <Option Id="COMPARE_VALUE.0" value="eq2&apos;hX"/>
        <Option Id="DISPLAY_AS_ENUM" value="1"/>
        <Option Id="DISPLAY_HINT" value=""/>
        <Option Id="DISPLAY_RADIX" value="HEX"/>
        <Option Id="DISPLAY_VISIBILITY" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="LINK_TO_WAVEFORM" value="1"/>
        <Option Id="MAP" value="probe2[1:0]"/>
        <Option Id="NAME.CUSTOM" value="module_commande_0_o_selection_fct"/>
        <Option Id="NAME.SELECT" value="Custom"/>
        <Option Id="SOURCE" value="netlist"/>
        <Option Id="TRIGGER_COMPARE_VALUE" value="eq2&apos;hX"/>
        <Option Id="WAVEFORM_STYLE" value="Digital"/>
      </probeOptions>
      <nets>
        <net name="design_1_i/system_ila_0/U0/probe2_1[1]"/>
        <net name="design_1_i/system_ila_0/U0/probe2_1[0]"/>
      </nets>
    </probe>
  </probeset>
</hwsession>