diff options
| author | Benjamin Chausse <benjamin@chausse.xyz> | 2025-05-18 14:07:21 -0400 |
|---|---|---|
| committer | Benjamin Chausse <benjamin@chausse.xyz> | 2025-05-18 14:07:21 -0400 |
| commit | 3d81cfe9c1028ae989f580e42aad0414081b5e7c (patch) | |
| tree | f81b6d41a123792d7a1e04b1ed4b52b13c279a2c /pb_logique_seq.srcs/sources_1/bd/design_1 | |
Batman
Diffstat (limited to 'pb_logique_seq.srcs/sources_1/bd/design_1')
58 files changed, 5197 insertions, 0 deletions
diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/design_1.bd b/pb_logique_seq.srcs/sources_1/bd/design_1/design_1.bd new file mode 100644 index 0000000..2f07b8c --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/design_1.bd @@ -0,0 +1,1505 @@ +{ + "design": { + "design_info": { + "boundary_crc": "0xD5C48FBFC0647294", + "device": "xc7z010clg400-1", + "gen_directory": "../../../../pb_logique_seq.gen/sources_1/bd/design_1", + "name": "design_1", + "rev_ctrl_bd_flag": "RevCtrlBdOff", + "synth_flow_mode": "Hierarchical", + "tool_version": "2020.2" + }, + "design_tree": { + "M1_decodeur_i2s": { + "compteur_7bits": "", + "MEF_decodeur_i2s": "", + "registre_24bits_droite": "", + "registre_24bits_gauche": "", + "registre_decalage_24bits": "", + "xlconstant_0": "", + "xlconstant_1": "" + }, + "M9_codeur_i2s": { + "compteur_nbits_0": "", + "mef_cod_i2s_vsb_0": "", + "mux2_0": "", + "reg_dec_24b_fd_0": "", + "util_vector_logic_0": "", + "xlconcat_0": "", + "xlconstant_0": "", + "xlslice_0": "" + }, + "M10_conversion_affichage": "", + "M5_parametre_1": "", + "M6_parametre_2": "", + "M7_parametre_3": "", + "Multiplexeur_choix_fonction": "", + "Multiplexeur_choix_parametre": "", + "M4_fonction3": "", + "M2_fonction_distortion_dure1": "", + "M3_fonction_distorsion_dure2": "", + "parametre_0": "", + "M8_commande": "" + }, + "ports": { + "i_recdat": { + "direction": "I" + }, + "i_lrc": { + "direction": "I" + }, + "i_btn": { + "direction": "I", + "left": "3", + "right": "0" + }, + "i_sw": { + "direction": "I", + "left": "3", + "right": "0" + }, + "clk_100MHz": { + "type": "clk", + "direction": "I", + "parameters": { + "FREQ_HZ": { + "value": "100000000" + } + } + }, + "o_pbdat": { + "direction": "O", + "left": "0", + "right": "0" + }, + "JPmod": { + "direction": "O", + "left": "7", + "right": "0" + }, + "o_param": { + "direction": "O", + "left": "7", + "right": "0" + }, + "o_sel_par": { + "direction": "O", + "left": "1", + "right": "0" + }, + "o_sel_fct": { + "direction": "O", + "left": "1", + "right": "0" + } + }, + "components": { + "M1_decodeur_i2s": { + "ports": { + "o_str_dat": { + "direction": "O" + }, + "o_dat_left": { + "direction": "O", + "left": "23", + "right": "0" + }, + "o_dat_right": { + "direction": "O", + "left": "23", + "right": "0" + }, + "clk": { + "direction": "I" + }, + "i_data": { + "direction": "I" + }, + "i_lrc": { + "direction": "I" + }, + "i_reset": { + "direction": "I" + } + }, + "components": { + "compteur_7bits": { + "vlnv": "xilinx.com:module_ref:compteur_nbits:1.0", + "xci_name": "design_1_compteur_7bits_0", + "xci_path": "ip/design_1_compteur_7bits_0/design_1_compteur_7bits_0.xci", + "inst_hier_path": "M1_decodeur_i2s/compteur_7bits", + "parameters": { + "nbits": { + "value": "7" + } + }, + "reference_info": { + "ref_type": "hdl", + "ref_name": "compteur_nbits", + "boundary_crc": "0x0" + }, + "ports": { + "clk": { + "type": "clk", + "direction": "I", + "parameters": { + "ASSOCIATED_RESET": { + "value": "reset", + "value_src": "constant" + }, + "FREQ_HZ": { + "value": "100000000", + "value_src": "user_prop" + }, + "CLK_DOMAIN": { + "value": "design_1_clk_100MHz", + "value_src": "default_prop" + } + } + }, + "i_en": { + "direction": "I" + }, + "reset": { + "type": "rst", + "direction": "I" + }, + "o_val_cpt": { + "direction": "O", + "left": "6", + "right": "0" + } + } + }, + "MEF_decodeur_i2s": { + "vlnv": "xilinx.com:module_ref:mef_decod_i2s_v1b:1.0", + "xci_name": "design_1_MEF_decodeur_i2s_0", + "xci_path": "ip/design_1_MEF_decodeur_i2s_0/design_1_MEF_decodeur_i2s_0.xci", + "inst_hier_path": "M1_decodeur_i2s/MEF_decodeur_i2s", + "reference_info": { + "ref_type": "hdl", + "ref_name": "mef_decod_i2s_v1b", + "boundary_crc": "0x0" + }, + "ports": { + "i_bclk": { + "direction": "I", + "parameters": { + "FREQ_HZ": { + "value": "100000000", + "value_src": "user_prop" + }, + "PHASE": { + "value": "0.000", + "value_src": "default_prop" + }, + "CLK_DOMAIN": { + "value": "design_1_clk_100MHz", + "value_src": "default_prop" + } + } + }, + "i_reset": { + "type": "rst", + "direction": "I" + }, + "i_lrc": { + "direction": "I" + }, + "i_cpt_bits": { + "direction": "I", + "left": "6", + "right": "0" + }, + "o_bit_enable": { + "direction": "O" + }, + "o_load_left": { + "direction": "O" + }, + "o_load_right": { + "direction": "O" + }, + "o_str_dat": { + "direction": "O" + }, + "o_cpt_bit_reset": { + "type": "rst", + "direction": "O" + } + } + }, + "registre_24bits_droite": { + "vlnv": "xilinx.com:module_ref:reg_24b:1.0", + "xci_name": "design_1_registre_24bits_droite_0", + "xci_path": "ip/design_1_registre_24bits_droite_0/design_1_registre_24bits_droite_0.xci", + "inst_hier_path": "M1_decodeur_i2s/registre_24bits_droite", + "reference_info": { + "ref_type": "hdl", + "ref_name": "reg_24b", + "boundary_crc": "0x0" + }, + "ports": { + "i_clk": { + "type": "clk", + "direction": "I", + "parameters": { + "ASSOCIATED_RESET": { + "value": "i_reset", + "value_src": "constant" + }, + "FREQ_HZ": { + "value": "100000000", + "value_src": "user_prop" + }, + "CLK_DOMAIN": { + "value": "design_1_clk_100MHz", + "value_src": "default_prop" + } + } + }, + "i_reset": { + "type": "rst", + "direction": "I" + }, + "i_en": { + "direction": "I" + }, + "i_dat": { + "direction": "I", + "left": "23", + "right": "0" + }, + "o_dat": { + "direction": "O", + "left": "23", + "right": "0" + } + } + }, + "registre_24bits_gauche": { + "vlnv": "xilinx.com:module_ref:reg_24b:1.0", + "xci_name": "design_1_registre_24bits_gauche_0", + "xci_path": "ip/design_1_registre_24bits_gauche_0/design_1_registre_24bits_gauche_0.xci", + "inst_hier_path": "M1_decodeur_i2s/registre_24bits_gauche", + "reference_info": { + "ref_type": "hdl", + "ref_name": "reg_24b", + "boundary_crc": "0x0" + }, + "ports": { + "i_clk": { + "type": "clk", + "direction": "I", + "parameters": { + "ASSOCIATED_RESET": { + "value": "i_reset", + "value_src": "constant" + }, + "FREQ_HZ": { + "value": "100000000", + "value_src": "user_prop" + }, + "CLK_DOMAIN": { + "value": "design_1_clk_100MHz", + "value_src": "default_prop" + } + } + }, + "i_reset": { + "type": "rst", + "direction": "I" + }, + "i_en": { + "direction": "I" + }, + "i_dat": { + "direction": "I", + "left": "23", + "right": "0" + }, + "o_dat": { + "direction": "O", + "left": "23", + "right": "0" + } + } + }, + "registre_decalage_24bits": { + "vlnv": "xilinx.com:module_ref:reg_dec_24b:1.0", + "xci_name": "design_1_registre_decalage_24bits_0", + "xci_path": "ip/design_1_registre_decalage_24bits_0/design_1_registre_decalage_24bits_0.xci", + "inst_hier_path": "M1_decodeur_i2s/registre_decalage_24bits", + "reference_info": { + "ref_type": "hdl", + "ref_name": "reg_dec_24b", + "boundary_crc": "0x0" + }, + "ports": { + "i_clk": { + "type": "clk", + "direction": "I", + "parameters": { + "ASSOCIATED_RESET": { + "value": "i_reset", + "value_src": "constant" + }, + "FREQ_HZ": { + "value": "100000000", + "value_src": "user_prop" + }, + "CLK_DOMAIN": { + "value": "design_1_clk_100MHz", + "value_src": "default_prop" + } + } + }, + "i_reset": { + "type": "rst", + "direction": "I" + }, + "i_load": { + "direction": "I" + }, + "i_en": { + "direction": "I" + }, + "i_dat_bit": { + "direction": "I" + }, + "i_dat_load": { + "direction": "I", + "left": "23", + "right": "0" + }, + "o_dat": { + "direction": "O", + "left": "23", + "right": "0" + } + } + }, + "xlconstant_0": { + "vlnv": "xilinx.com:ip:xlconstant:1.1", + "xci_name": "design_1_xlconstant_0_0", + "xci_path": "ip/design_1_xlconstant_0_0_1/design_1_xlconstant_0_0.xci", + "inst_hier_path": "M1_decodeur_i2s/xlconstant_0" + }, + "xlconstant_1": { + "vlnv": "xilinx.com:ip:xlconstant:1.1", + "xci_name": "design_1_xlconstant_1_0", + "xci_path": "ip/design_1_xlconstant_1_0/design_1_xlconstant_1_0.xci", + "inst_hier_path": "M1_decodeur_i2s/xlconstant_1", + "parameters": { + "CONST_WIDTH": { + "value": "24" + } + } + } + }, + "nets": { + "reg_dec_24b_0_o_dat": { + "ports": [ + "registre_decalage_24bits/o_dat", + "registre_24bits_droite/i_dat", + "registre_24bits_gauche/i_dat" + ] + }, + "mef_decod_i2s_v1b_0_o_load_left": { + "ports": [ + "MEF_decodeur_i2s/o_load_left", + "registre_24bits_gauche/i_en" + ] + }, + "mef_decod_i2s_v1b_0_o_load_right": { + "ports": [ + "MEF_decodeur_i2s/o_load_right", + "registre_24bits_droite/i_en" + ] + }, + "mef_decod_i2s_v1b_0_o_str_dat": { + "ports": [ + "MEF_decodeur_i2s/o_str_dat", + "o_str_dat" + ] + }, + "reg_24b_1_o_dat": { + "ports": [ + "registre_24bits_gauche/o_dat", + "o_dat_left" + ] + }, + "reg_24b_0_o_dat": { + "ports": [ + "registre_24bits_droite/o_dat", + "o_dat_right" + ] + }, + "clk_1": { + "ports": [ + "clk", + "compteur_7bits/clk", + "MEF_decodeur_i2s/i_bclk", + "registre_24bits_droite/i_clk", + "registre_24bits_gauche/i_clk", + "registre_decalage_24bits/i_clk" + ] + }, + "mef_decod_i2s_v1b_0_o_cpt_bit_reset": { + "ports": [ + "MEF_decodeur_i2s/o_cpt_bit_reset", + "compteur_7bits/reset" + ] + }, + "mef_decod_i2s_v1b_0_o_bit_enable": { + "ports": [ + "MEF_decodeur_i2s/o_bit_enable", + "compteur_7bits/i_en", + "registre_decalage_24bits/i_en" + ] + }, + "i_data_1": { + "ports": [ + "i_data", + "registre_decalage_24bits/i_dat_bit" + ] + }, + "i_lrc_1": { + "ports": [ + "i_lrc", + "MEF_decodeur_i2s/i_lrc" + ] + }, + "compteur_nbits_0_o_val_cpt": { + "ports": [ + "compteur_7bits/o_val_cpt", + "MEF_decodeur_i2s/i_cpt_bits" + ] + }, + "i_reset_1": { + "ports": [ + "i_reset", + "MEF_decodeur_i2s/i_reset", + "registre_24bits_droite/i_reset", + "registre_24bits_gauche/i_reset", + "registre_decalage_24bits/i_reset" + ] + }, + "xlconstant_0_dout": { + "ports": [ + "xlconstant_0/dout", + "registre_decalage_24bits/i_load" + ] + }, + "xlconstant_1_dout": { + "ports": [ + "xlconstant_1/dout", + "registre_decalage_24bits/i_dat_load" + ] + } + } + }, + "M9_codeur_i2s": { + "ports": { + "i_lrc": { + "direction": "I" + }, + "i_dat_left": { + "direction": "I", + "left": "23", + "right": "0" + }, + "i_dat_right": { + "direction": "I", + "left": "23", + "right": "0" + }, + "i_reset": { + "type": "rst", + "direction": "I" + }, + "i_bclk": { + "direction": "I" + }, + "o_dat": { + "direction": "O", + "left": "0", + "right": "0" + } + }, + "components": { + "compteur_nbits_0": { + "vlnv": "xilinx.com:module_ref:compteur_nbits:1.0", + "xci_name": "design_1_compteur_nbits_0_0", + "xci_path": "ip/design_1_compteur_nbits_0_0_1/design_1_compteur_nbits_0_0.xci", + "inst_hier_path": "M9_codeur_i2s/compteur_nbits_0", + "parameters": { + "nbits": { + "value": "7" + } + }, + "reference_info": { + "ref_type": "hdl", + "ref_name": "compteur_nbits", + "boundary_crc": "0x0" + }, + "ports": { + "clk": { + "type": "clk", + "direction": "I", + "parameters": { + "ASSOCIATED_RESET": { + "value": "reset", + "value_src": "constant" + }, + "FREQ_HZ": { + "value": "100000000", + "value_src": "user_prop" + }, + "CLK_DOMAIN": { + "value": "design_1_clk_100MHz", + "value_src": "default_prop" + } + } + }, + "i_en": { + "direction": "I" + }, + "reset": { + "type": "rst", + "direction": "I" + }, + "o_val_cpt": { + "direction": "O", + "left": "6", + "right": "0" + } + } + }, + "mef_cod_i2s_vsb_0": { + "vlnv": "xilinx.com:module_ref:mef_cod_i2s_vsb:1.0", + "xci_name": "design_1_mef_cod_i2s_vsb_0_0", + "xci_path": "ip/design_1_mef_cod_i2s_vsb_0_0_1/design_1_mef_cod_i2s_vsb_0_0.xci", + "inst_hier_path": "M9_codeur_i2s/mef_cod_i2s_vsb_0", + "reference_info": { + "ref_type": "hdl", + "ref_name": "mef_cod_i2s_vsb", + "boundary_crc": "0x0" + }, + "ports": { + "i_bclk": { + "direction": "I", + "parameters": { + "FREQ_HZ": { + "value": "100000000", + "value_src": "user_prop" + }, + "PHASE": { + "value": "0.000", + "value_src": "default_prop" + }, + "CLK_DOMAIN": { + "value": "design_1_clk_100MHz", + "value_src": "default_prop" + } + } + }, + "i_reset": { + "type": "rst", + "direction": "I" + }, + "i_lrc": { + "direction": "I" + }, + "i_cpt_bits": { + "direction": "I", + "left": "6", + "right": "0" + }, + "o_bit_enable": { + "direction": "O" + }, + "o_load_left": { + "direction": "O", + "parameters": { + "PortType": { + "value": "undef", + "value_src": "ip_prop" + }, + "PortType.PROP_SRC": { + "value": "false", + "value_src": "ip_prop" + } + } + }, + "o_load_right": { + "direction": "O", + "parameters": { + "PortType": { + "value": "undef", + "value_src": "ip_prop" + }, + "PortType.PROP_SRC": { + "value": "false", + "value_src": "ip_prop" + } + } + }, + "o_cpt_bit_reset": { + "type": "rst", + "direction": "O" + } + } + }, + "mux2_0": { + "vlnv": "xilinx.com:module_ref:mux2:1.0", + "xci_name": "design_1_mux2_0_0", + "xci_path": "ip/design_1_mux2_0_0_1/design_1_mux2_0_0.xci", + "inst_hier_path": "M9_codeur_i2s/mux2_0", + "reference_info": { + "ref_type": "hdl", + "ref_name": "mux2", + "boundary_crc": "0x0" + }, + "ports": { + "sel": { + "direction": "I", + "left": "1", + "right": "0", + "parameters": { + "PortWidth": { + "value": "2", + "value_src": "ip_prop" + } + } + }, + "input1": { + "direction": "I", + "left": "23", + "right": "0" + }, + "input2": { + "direction": "I", + "left": "23", + "right": "0" + }, + "output0": { + "direction": "O", + "left": "23", + "right": "0" + } + } + }, + "reg_dec_24b_fd_0": { + "vlnv": "xilinx.com:module_ref:reg_dec_24b_fd:1.0", + "xci_name": "design_1_reg_dec_24b_fd_0_0", + "xci_path": "ip/design_1_reg_dec_24b_fd_0_0_1/design_1_reg_dec_24b_fd_0_0.xci", + "inst_hier_path": "M9_codeur_i2s/reg_dec_24b_fd_0", + "reference_info": { + "ref_type": "hdl", + "ref_name": "reg_dec_24b_fd", + "boundary_crc": "0x0" + }, + "ports": { + "i_clk": { + "type": "clk", + "direction": "I", + "parameters": { + "ASSOCIATED_RESET": { + "value": "i_reset", + "value_src": "constant" + }, + "FREQ_HZ": { + "value": "100000000", + "value_src": "user_prop" + }, + "CLK_DOMAIN": { + "value": "design_1_clk_100MHz", + "value_src": "default_prop" + } + } + }, + "i_reset": { + "type": "rst", + "direction": "I" + }, + "i_load": { + "direction": "I", + "parameters": { + "PortType": { + "value": "undef", + "value_src": "ip_prop" + }, + "PortType.PROP_SRC": { + "value": "false", + "value_src": "ip_prop" + } + } + }, + "i_en": { + "direction": "I" + }, + "i_dat_bit": { + "direction": "I" + }, + "i_dat_load": { + "direction": "I", + "left": "23", + "right": "0" + }, + "o_dat": { + "direction": "O", + "left": "23", + "right": "0" + } + } + }, + "util_vector_logic_0": { + "vlnv": "xilinx.com:ip:util_vector_logic:2.0", + "xci_name": "design_1_util_vector_logic_0_0", + "xci_path": "ip/design_1_util_vector_logic_0_0_1/design_1_util_vector_logic_0_0.xci", + "inst_hier_path": "M9_codeur_i2s/util_vector_logic_0", + "parameters": { + "C_OPERATION": { + "value": "or" + }, + "C_SIZE": { + "value": "1" + } + } + }, + "xlconcat_0": { + "vlnv": "xilinx.com:ip:xlconcat:2.1", + "xci_name": "design_1_xlconcat_0_0", + "xci_path": "ip/design_1_xlconcat_0_0_1/design_1_xlconcat_0_0.xci", + "inst_hier_path": "M9_codeur_i2s/xlconcat_0" + }, + "xlconstant_0": { + "vlnv": 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+ "ports": [ + "clk_100MHz", + "M1_decodeur_i2s/clk", + "M9_codeur_i2s/i_bclk", + "M10_conversion_affichage/clk", + "M5_parametre_1/i_bclk", + "M6_parametre_2/i_bclk", + "M7_parametre_3/i_bclk", + "M8_commande/clk" + ] + }, + "i_data_1": { + "ports": [ + "i_recdat", + "M1_decodeur_i2s/i_data" + ] + }, + "i_lrc_1": { + "ports": [ + "i_lrc", + "M1_decodeur_i2s/i_lrc", + "M9_codeur_i2s/i_lrc" + ] + }, + "mux4_1_output": { + "ports": [ + "Multiplexeur_choix_parametre/output0", + "o_param", + "M10_conversion_affichage/DA" + ] + }, + "i_btn_1": { + "ports": [ + "i_btn", + "M8_commande/i_btn" + ] + }, + "i_sw_1": { + "ports": [ + "i_sw", + "M8_commande/i_sw" + ] + }, + "i_dat_left_1": { + "ports": [ + "M1_decodeur_i2s/o_dat_left", + "M9_codeur_i2s/i_dat_left" + ] + }, + "i_dat_right_1": { + "ports": [ + "Multiplexeur_choix_fonction/output0", + "M9_codeur_i2s/i_dat_right", + "M5_parametre_1/i_ech", + "M6_parametre_2/i_ech", + "M7_parametre_3/i_ech" + ] + }, + "decodeur_i2s_o_dat_right": { + "ports": [ + "M1_decodeur_i2s/o_dat_right", + "Multiplexeur_choix_fonction/input0", + "M4_fonction3/i_ech", + "M2_fonction_distortion_dure1/i_ech", + "M3_fonction_distorsion_dure2/i_ech" + ] + }, + "M8_commande_o_selection_par": { + "ports": [ + "M8_commande/o_selection_par", + "o_sel_par", + "Multiplexeur_choix_parametre/sel" + ] + }, + "M9_codeur_i2s_o_dat": { + "ports": [ + "M9_codeur_i2s/o_dat", + "o_pbdat" + ] + }, + "M10_conversion_affichage_JPmod": { + "ports": [ + "M10_conversion_affichage/JPmod", + "JPmod" + ] + }, + "i_reset_1": { + "ports": [ + "M8_commande/o_reset", + "M1_decodeur_i2s/i_reset", + "M9_codeur_i2s/i_reset", + "M10_conversion_affichage/reset", + "M5_parametre_1/i_reset", + "M6_parametre_2/i_reset", + "M7_parametre_3/i_reset" + ] + }, + "M8_commande_o_btn_cd": { + "ports": [ + "M8_commande/o_btn_cd", + "M10_conversion_affichage/i_btn" + ] + } + }, + "comments": { + "/": { + "comment_1": "Modules à modifier:\nMEF_decodeur_i2s (dans M1_decodeur_i2s)\nM5_parametre_1\nM6_parametre_2\nM8_commande\nPour plus de clarté, vous pouvez cacher les fils pour les horloges\net les resets dans les paramètres (engrenage en haut a droite de cette fenêtre).\n" + } + } + } +}
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b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_M3_fonction_distorsion_dure2_0/design_1_M3_fonction_distorsion_dure2_0.xci new file mode 100644 index 0000000..9b05ad7 --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_M3_fonction_distorsion_dure2_0/design_1_M3_fonction_distorsion_dure2_0.xci @@ -0,0 +1,39 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_M3_fonction_distorsion_dure2_0</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="module_ref" spirit:name="sig_fct_sat_dure" spirit:version="1.0"/> + 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a/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_Multiplexeur_choix_fonction_0/design_1_Multiplexeur_choix_fonction_0.xci b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_Multiplexeur_choix_fonction_0/design_1_Multiplexeur_choix_fonction_0.xci new file mode 100644 index 0000000..b9556f5 --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_Multiplexeur_choix_fonction_0/design_1_Multiplexeur_choix_fonction_0.xci @@ -0,0 +1,39 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_Multiplexeur_choix_fonction_0</spirit:instanceName> + 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a/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_affhexPmodSSD_v3_0_0/design_1_affhexPmodSSD_v3_0_0.xci b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_affhexPmodSSD_v3_0_0/design_1_affhexPmodSSD_v3_0_0.xci new file mode 100644 index 0000000..4ae225e --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_affhexPmodSSD_v3_0_0/design_1_affhexPmodSSD_v3_0_0.xci @@ -0,0 +1,63 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_affhexPmodSSD_v3_0_0</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" 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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_mux2_0_0</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="module_ref" spirit:name="mux2" spirit:version="1.0"/> + <spirit:configurableElementValues> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.input_length">24</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">design_1_mux2_0_0</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.input_length">24</spirit:configurableElementValue> + <spirit:configurableElementValue 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<spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_sig_fct_sat_dure_0_0</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="module_ref" spirit:name="sig_fct_sat_dure" spirit:version="1.0"/> + <spirit:configurableElementValues> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.c_ech_u24_max">0x7FFFFF</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">design_1_sig_fct_sat_dure_0_0</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.c_ech_u24_max">0x7FFFFF</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue> + <spirit:configurableElementValue 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b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_sig_fct_sat_dure_0_1/design_1_sig_fct_sat_dure_0_1.xci new file mode 100644 index 0000000..a97a128 --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_sig_fct_sat_dure_0_1/design_1_sig_fct_sat_dure_0_1.xci @@ -0,0 +1,39 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_sig_fct_sat_dure_0_1</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="module_ref" spirit:name="sig_fct_sat_dure" spirit:version="1.0"/> + <spirit:configurableElementValues> + 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<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue> + </spirit:configurableElementValues> + </spirit:componentInstance> + </spirit:componentInstances> +</spirit:design> diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_1/design_1_xlconstant_0_1.xci b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_1/design_1_xlconstant_0_1.xci new file mode 100644 index 0000000..1f2402d --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_1/design_1_xlconstant_0_1.xci @@ -0,0 +1,41 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_xlconstant_0_1</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="xlconstant" spirit:version="1.1"/> + <spirit:configurableElementValues> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_VAL">0x1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_WIDTH">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_VAL">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_WIDTH">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">design_1_xlconstant_0_1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART">digilentinc.com:zybo-z7-10:part0:1.0</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z010</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg400</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">7</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../../../../pb_logique_seq.gen/sources_1/bd/design_1/ip/design_1_xlconstant_0_1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2020.2</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue> + </spirit:configurableElementValues> + </spirit:componentInstance> + </spirit:componentInstances> +</spirit:design> diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_1_1/design_1_xlconstant_0_1.xci b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_1_1/design_1_xlconstant_0_1.xci new file mode 100644 index 0000000..20d8e64 --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_1_1/design_1_xlconstant_0_1.xci @@ -0,0 +1,41 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_xlconstant_0_1</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="xlconstant" spirit:version="1.1"/> + <spirit:configurableElementValues> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_VAL">0x1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_WIDTH">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_VAL">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_WIDTH">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">design_1_xlconstant_0_1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z010</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg400</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">7</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../../../../pb_logique_seq.gen/sources_1/bd/design_1/ip/design_1_xlconstant_0_1_1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2020.2</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue> + </spirit:configurableElementValues> + </spirit:componentInstance> + </spirit:componentInstances> +</spirit:design> diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_2/design_1_xlconstant_0_2.xci b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_2/design_1_xlconstant_0_2.xci new file mode 100644 index 0000000..d44584f --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_2/design_1_xlconstant_0_2.xci @@ -0,0 +1,41 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_xlconstant_0_2</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="xlconstant" spirit:version="1.1"/> + <spirit:configurableElementValues> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_VAL">0x1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_WIDTH">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_VAL">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_WIDTH">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">design_1_xlconstant_0_2</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART">digilentinc.com:zybo-z7-10:part0:1.0</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z010</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg400</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">7</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../../../../pb_logique_seq.gen/sources_1/bd/design_1/ip/design_1_xlconstant_0_2</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2020.2</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue> + </spirit:configurableElementValues> + </spirit:componentInstance> + </spirit:componentInstances> +</spirit:design> diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_3/design_1_xlconstant_0_3.xci b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_3/design_1_xlconstant_0_3.xci new file mode 100644 index 0000000..94d4ba3 --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_0_3/design_1_xlconstant_0_3.xci @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_xlconstant_0_3</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="xlconstant" spirit:version="1.1"/> + <spirit:configurableElementValues> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_VAL">0x000001</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_WIDTH">24</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_VAL">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_WIDTH">24</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">design_1_xlconstant_0_3</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART">digilentinc.com:zybo-z7-10:part0:1.0</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z010</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg400</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">7</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../../../../pb_logique_seq.gen/sources_1/bd/design_1/ip/design_1_xlconstant_0_3</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL">rtl</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2020.2</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue> + </spirit:configurableElementValues> + <spirit:vendorExtensions> + <xilinx:componentInstanceExtensions> + <xilinx:configElementInfos> + <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.CONST_WIDTH" xilinx:valueSource="user"/> + </xilinx:configElementInfos> + </xilinx:componentInstanceExtensions> + </spirit:vendorExtensions> + </spirit:componentInstance> + </spirit:componentInstances> +</spirit:design> diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_1_0/design_1_xlconstant_1_0.xci b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_1_0/design_1_xlconstant_1_0.xci new file mode 100644 index 0000000..5821b63 --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlconstant_1_0/design_1_xlconstant_1_0.xci @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_xlconstant_1_0</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="xlconstant" spirit:version="1.1"/> + <spirit:configurableElementValues> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_VAL">0x000001</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_WIDTH">24</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_VAL">1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_WIDTH">24</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">design_1_xlconstant_1_0</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z010</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg400</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-1</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">7</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../../../../pb_logique_seq.gen/sources_1/bd/design_1/ip/design_1_xlconstant_1_0</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2020.2</spirit:configurableElementValue> + <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue> + </spirit:configurableElementValues> + <spirit:vendorExtensions> + <xilinx:componentInstanceExtensions> + <xilinx:configElementInfos> + <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.CONST_WIDTH" xilinx:valueSource="user"/> + </xilinx:configElementInfos> + </xilinx:componentInstanceExtensions> + </spirit:vendorExtensions> + </spirit:componentInstance> + </spirit:componentInstances> +</spirit:design> diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlslice_0_0/design_1_xlslice_0_0.xci b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlslice_0_0/design_1_xlslice_0_0.xci new file mode 100644 index 0000000..0bf5c35 --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ip/design_1_xlslice_0_0/design_1_xlslice_0_0.xci @@ -0,0 +1,54 @@ +<?xml version="1.0" encoding="UTF-8"?> +<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <spirit:vendor>xilinx.com</spirit:vendor> + <spirit:library>xci</spirit:library> + <spirit:name>unknown</spirit:name> + <spirit:version>1.0</spirit:version> + <spirit:componentInstances> + <spirit:componentInstance> + <spirit:instanceName>design_1_xlslice_0_0</spirit:instanceName> + <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="xlslice" spirit:version="1.0"/> + <spirit:configurableElementValues> + <spirit:configurableElementValue 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View_TopLeft":"97,125", + "Display-PortTypeClock":"true", + "ExpandedHierarchyInLayout":"", + "comment_1":"Modules à modifier: +MEF_decodeur_i2s (dans M1_decodeur_i2s) +M5_parametre_1 +M6_parametre_2 +M8_commande +Pour plus de clarté, vous pouvez cacher les fils pour les horloges +et les resets dans les paramètres (engrenage en haut a droite de cette fenêtre). +", + "commentid":"comment_1|", + "font_comment_1":"14", + "guistr":"# # String gsaved with Nlview 7.0r4 2019-12-20 bk=1.5203 VDI=41 GEI=36 GUI=JA:10.0 TLS +# -string -flagsOSRD +preplace port i_recdat -pg 1 -lvl 0 -x -140 -y 340 -defaultsOSRD +preplace port i_lrc -pg 1 -lvl 0 -x -140 -y 360 -defaultsOSRD +preplace port clk_100MHz -pg 1 -lvl 0 -x -140 -y 380 -defaultsOSRD +preplace portBus i_btn -pg 1 -lvl 0 -x -140 -y 730 -defaultsOSRD +preplace portBus i_sw -pg 1 -lvl 0 -x -140 -y 750 -defaultsOSRD +preplace portBus o_pbdat -pg 1 -lvl 7 -x 2150 -y 570 -defaultsOSRD +preplace portBus JPmod -pg 1 -lvl 7 -x 2150 -y 270 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M3_fonction_distorsion_dure2 -pg 1 -lvl 2 -x 390 -y 280 -defaultsOSRD +preplace inst parametre_0 -pg 1 -lvl 4 -x 1040 -y 30 -defaultsOSRD +preplace inst M8_commande -pg 1 -lvl 2 -x 390 -y 730 -defaultsOSRD +preplace netloc sig_fct_sat_dure_0_o_ech_fct 1 2 1 540 180n +preplace netloc sig_fct_sat_dure_1_o_ech_fct 1 2 1 550 270n +preplace netloc sig_fct_3_0_o_ech_fct 1 2 1 540 290n +preplace netloc module_commande_0_o_selection_fct 1 2 5 550 700 N 700 N 700 N 700 N +preplace netloc calcul_param_1_0_o_param 1 4 1 1180 160n +preplace netloc calcul_param_2_0_o_param 1 4 1 1180 280n +preplace netloc calcul_param_3_0_o_param 1 4 1 1190 300n +preplace netloc xlconstant_0_dout 1 4 1 1200 30n +preplace netloc decodeur_i2s_o_str_dat 1 1 3 210J 110 NJ 110 880 +preplace netloc clk_1 1 0 6 -110 450 210 450 NJ 450 870 590 1210J 560 1500 +preplace netloc i_data_1 1 0 1 NJ 340 +preplace netloc i_lrc_1 1 0 1 -120 360n +preplace netloc mux4_1_output 1 5 2 1510 120 N +preplace netloc i_btn_1 1 0 2 NJ 730 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\ No newline at end of file diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_72e80fe5.ui b/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_72e80fe5.ui new file mode 100644 index 0000000..7bffbd6 --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_72e80fe5.ui @@ -0,0 +1,42 @@ +{ + "ActiveEmotionalView":"Default View", + "Default View_ScaleFactor":"0.651547", + "Default View_TopLeft":"-152,-117", + "ExpandedHierarchyInLayout":"", + "guistr":"# # String gsaved with Nlview 7.0r6 2020-01-29 bk=1.5227 VDI=41 GEI=36 GUI=JA:10.0 non-TLS +# -string -flagsOSRD +preplace port i_lrc -pg 1 -lvl 0 -x 0 -y 370 -defaultsOSRD +preplace port i_reset -pg 1 -lvl 0 -x 0 -y 350 -defaultsOSRD +preplace port i_bclk -pg 1 -lvl 0 -x 0 -y 390 -defaultsOSRD +preplace portBus i_dat_left -pg 1 -lvl 0 -x 0 -y 220 -defaultsOSRD +preplace portBus i_dat_right -pg 1 -lvl 0 -x 0 -y 240 -defaultsOSRD +preplace portBus o_dat -pg 1 -lvl 7 -x 1620 -y 350 -defaultsOSRD +preplace inst mef_cod_i2s_vsb_0 -pg 1 -lvl 2 -x 440 -y 420 -defaultsOSRD +preplace inst compteur_nbits_0 -pg 1 -lvl 1 -x 150 -y 450 -defaultsOSRD +preplace inst reg_dec_24b_fd_0 -pg 1 -lvl 5 -x 1250 -y 350 -defaultsOSRD +preplace inst mux2_0 -pg 1 -lvl 4 -x 940 -y 220 -defaultsOSRD +preplace inst util_vector_logic_0 -pg 1 -lvl 4 -x 940 -y 70 -defaultsOSRD +preplace inst xlconcat_0 -pg 1 -lvl 3 -x 700 -y 150 -defaultsOSRD +preplace inst xlconstant_0 -pg 1 -lvl 4 -x 940 -y 380 -defaultsOSRD +preplace inst xlslice_0 -pg 1 -lvl 6 -x 1500 -y 350 -defaultsOSRD +preplace netloc compteur_nbits_0_o_val_cpt 1 1 1 N 450 +preplace netloc mef_cod_i2s_vsb_0_o_cpt_bit_reset 1 0 3 30 530 NJ 530 600 +preplace netloc mef_cod_i2s_vsb_0_o_bit_enable 1 0 5 30 310 NJ 310 590 310 NJ 310 1090 +preplace netloc mux2_0_output 1 4 1 1100 220n +preplace netloc util_vector_logic_0_Res 1 4 1 1110 70n +preplace netloc mef_cod_i2s_vsb_0_o_load_left 1 2 2 600 60 NJ +preplace netloc mef_cod_i2s_vsb_0_o_load_right 1 2 2 610 80 NJ +preplace netloc xlconcat_0_dout 1 3 1 790 150n +preplace netloc i_lrc_0_1 1 0 2 NJ 370 270J +preplace netloc input1_0_1 1 0 4 NJ 220 NJ 220 NJ 220 NJ +preplace netloc input2_0_1 1 0 4 NJ 240 NJ 240 NJ 240 NJ +preplace netloc i_reset_0_1 1 0 5 NJ 350 290 320 NJ 320 NJ 320 NJ +preplace netloc i_bclk_0_1 1 0 5 20 360 280 300 NJ 300 NJ 300 NJ +preplace netloc xlconstant_0_dout 1 4 1 NJ 380 +preplace netloc reg_dec_24b_fd_0_o_dat 1 5 1 NJ 350 +preplace netloc xlslice_0_Dout 1 6 1 NJ 350 +levelinfo -pg 1 0 150 440 700 940 1250 1500 1620 +pagesize -pg 1 -db -bbox -sgen -160 0 1740 540 +" +} + diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_a93fd001.ui b/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_a93fd001.ui new file mode 100644 index 0000000..4782fda --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_a93fd001.ui @@ -0,0 +1,46 @@ +{ + "/comment_1":"comment_0", + "ActiveEmotionalView":"Default View", + "Default View_Layers":"/M1_decodeur_i2s/clk_1:true|/M1_decodeur_i2s/mef_decod_i2s_v1b_0_o_cpt_bit_reset:true|/M1_decodeur_i2s/i_reset_1:true|", + "Default View_ScaleFactor":"0.812903", + "Default View_TopLeft":"-105,60", + "Display-PortTypeClock":"true", + "Display-PortTypeOthers":"true", + "Display-PortTypeReset":"true", + "ExpandedHierarchyInLayout":"", + "guistr":"# # String gsaved with Nlview 7.0r6 2020-01-29 bk=1.5227 VDI=41 GEI=36 GUI=JA:10.0 non-TLS +# -string -flagsOSRD +preplace port o_str_dat -pg 1 -lvl 4 -x 940 -y 180 -defaultsOSRD +preplace port clk -pg 1 -lvl 0 -x 0 -y 260 -defaultsOSRD +preplace port i_data -pg 1 -lvl 0 -x 0 -y 560 -defaultsOSRD +preplace port i_lrc -pg 1 -lvl 0 -x 0 -y 170 -defaultsOSRD +preplace port i_reset -pg 1 -lvl 0 -x 0 -y 440 -defaultsOSRD +preplace portBus o_dat_left -pg 1 -lvl 4 -x 940 -y 300 -defaultsOSRD +preplace portBus o_dat_right -pg 1 -lvl 4 -x 940 -y 460 -defaultsOSRD +preplace inst compteur_7bits -pg 1 -lvl 1 -x 160 -y 360 -defaultsOSRD +preplace inst MEF_decodeur_i2s -pg 1 -lvl 2 -x 460 -y 160 -defaultsOSRD +preplace inst registre_24bits_droite -pg 1 -lvl 3 -x 790 -y 460 -defaultsOSRD +preplace inst registre_24bits_gauche -pg 1 -lvl 3 -x 790 -y 300 -defaultsOSRD +preplace inst registre_decalage_24bits -pg 1 -lvl 2 -x 460 -y 510 -defaultsOSRD +preplace inst xlconstant_0 -pg 1 -lvl 1 -x 160 -y 500 -defaultsOSRD +preplace inst xlconstant_1 -pg 1 -lvl 1 -x 160 -y 620 -defaultsOSRD +preplace netloc reg_dec_24b_0_o_dat 1 2 1 650 330n +preplace netloc mef_decod_i2s_v1b_0_o_load_left 1 2 1 650 140n +preplace netloc mef_decod_i2s_v1b_0_o_load_right 1 2 1 630 160n +preplace netloc mef_decod_i2s_v1b_0_o_str_dat 1 2 2 NJ 180 NJ +preplace netloc reg_24b_1_o_dat 1 3 1 NJ 300 +preplace netloc reg_24b_0_o_dat 1 3 1 NJ 460 +preplace netloc clk_1 1 0 3 20 270 300 270 660 +preplace netloc mef_decod_i2s_v1b_0_o_cpt_bit_reset 1 0 3 30 260 NJ 260 610 +preplace netloc mef_decod_i2s_v1b_0_o_bit_enable 1 0 3 40 280 280 280 620 +preplace netloc i_data_1 1 0 2 NJ 560 290J +preplace netloc i_lrc_1 1 0 2 NJ 170 NJ +preplace netloc compteur_nbits_0_o_val_cpt 1 1 1 290 190n +preplace netloc i_reset_1 1 0 3 NJ 440 310 290 640 +preplace netloc xlconstant_0_dout 1 1 1 NJ 500 +preplace netloc xlconstant_1_dout 1 1 1 310J 560n +levelinfo -pg 1 0 160 460 790 940 +pagesize -pg 1 -db -bbox -sgen -100 0 1100 680 +" +} +0 diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_ab1f8e66.ui b/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_ab1f8e66.ui new file mode 100644 index 0000000..949814f --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_ab1f8e66.ui @@ -0,0 +1,38 @@ +{ + "ActiveEmotionalView":"Default View", + "Default View_ScaleFactor":"0.82623", + "Default View_TopLeft":"-531,-589", + "ExpandedHierarchyInLayout":"", + "commentid":"", + "guistr":"# # String gsaved with Nlview 7.0r6 2020-01-29 bk=1.5227 VDI=41 GEI=36 GUI=JA:10.0 non-TLS +# -string -flagsOSRD +preplace port o_str_dat -pg 1 -lvl 3 -x 700 -y -480 -defaultsOSRD +preplace port clk -pg 1 -lvl 0 -x -350 -y -520 -defaultsOSRD +preplace port i_data -pg 1 -lvl 0 -x -350 -y -60 -defaultsOSRD +preplace port i_lrc -pg 1 -lvl 0 -x -350 -y -480 -defaultsOSRD +preplace port i_reset -pg 1 -lvl 0 -x -350 -y -500 -defaultsOSRD +preplace portBus o_dat_left -pg 1 -lvl 3 -x 700 -y -390 -defaultsOSRD +preplace portBus o_dat_right -pg 1 -lvl 3 -x 700 -y -230 -defaultsOSRD +preplace inst MEF_decodeur_i2s -pg 1 -lvl 1 -x -140 -y -490 -defaultsOSRD +preplace inst compteur_7bits -pg 1 -lvl 1 -x -140 -y -280 -defaultsOSRD +preplace inst registre_decalage_24bits -pg 1 -lvl 1 -x -140 -y -90 -defaultsOSRD +preplace inst registre_24bits_gauche -pg 1 -lvl 2 -x 420 -y -390 -defaultsOSRD +preplace inst registre_24bits_droite -pg 1 -lvl 2 -x 420 -y -230 -defaultsOSRD +preplace netloc reg_dec_24b_0_o_dat 1 1 1 60 -360n +preplace netloc mef_decod_i2s_v1b_0_o_load_left 1 1 1 60 -510n +preplace netloc mef_decod_i2s_v1b_0_o_load_right 1 1 1 40 -490n +preplace netloc mef_decod_i2s_v1b_0_o_str_dat 1 1 2 50J -480 NJ +preplace netloc reg_24b_1_o_dat 1 2 1 NJ -390 +preplace netloc reg_24b_0_o_dat 1 2 1 NJ -230 +preplace netloc clk_1 1 0 2 -320 -370 70 +preplace netloc mef_decod_i2s_v1b_0_o_cpt_bit_reset 1 0 2 -310 -360 20 +preplace netloc mef_decod_i2s_v1b_0_o_bit_enable 1 0 2 -300 -200 30 +preplace netloc i_data_1 1 0 1 NJ -60 +preplace netloc i_lrc_1 1 0 1 NJ -480 +preplace netloc compteur_nbits_0_o_val_cpt 1 0 2 -300 -380 10 +preplace netloc i_reset_1 1 0 2 -330 -390 80 +levelinfo -pg 1 -350 -140 420 700 +pagesize -pg 1 -db -bbox -sgen -450 -590 860 200 +" +} +0 diff --git a/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_c2b8c4f8.ui b/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_c2b8c4f8.ui new file mode 100644 index 0000000..ea876df --- /dev/null +++ b/pb_logique_seq.srcs/sources_1/bd/design_1/ui/bd_c2b8c4f8.ui @@ -0,0 +1,46 @@ +{ + "ActiveEmotionalView":"Default View", + "Default View_Layers":"/M9_codeur_i2s/i_bclk_0_1:true|/M9_codeur_i2s/mef_cod_i2s_vsb_0_o_cpt_bit_reset:true|/M9_codeur_i2s/i_reset_0_1:true|", + "Default View_ScaleFactor":"0.821352", + "Default View_TopLeft":"-172,-140", + "Display-PortTypeClock":"true", + "Display-PortTypeOthers":"true", + "Display-PortTypeReset":"true", + "ExpandedHierarchyInLayout":"", + "guistr":"# # String gsaved with Nlview 7.0r6 2020-01-29 bk=1.5227 VDI=41 GEI=36 GUI=JA:10.0 non-TLS +# -string -flagsOSRD +preplace port i_lrc -pg 1 -lvl 0 -x -20 -y 220 -defaultsOSRD +preplace port i_reset -pg 1 -lvl 0 -x -20 -y 40 -defaultsOSRD +preplace port i_bclk -pg 1 -lvl 0 -x -20 -y 20 -defaultsOSRD +preplace portBus i_dat_left -pg 1 -lvl 0 -x -20 -y 80 -defaultsOSRD +preplace portBus i_dat_right -pg 1 -lvl 0 -x -20 -y 100 -defaultsOSRD +preplace portBus o_dat -pg 1 -lvl 7 -x 1680 -y 220 -defaultsOSRD +preplace inst compteur_nbits_0 -pg 1 -lvl 1 -x 140 -y 300 -defaultsOSRD +preplace inst mef_cod_i2s_vsb_0 -pg 1 -lvl 2 -x 430 -y 270 -defaultsOSRD +preplace inst mux2_0 -pg 1 -lvl 4 -x 960 -y 80 -defaultsOSRD +preplace inst reg_dec_24b_fd_0 -pg 1 -lvl 5 -x 1290 -y 220 -defaultsOSRD +preplace inst util_vector_logic_0 -pg 1 -lvl 4 -x 960 -y 210 -defaultsOSRD +preplace inst xlconcat_0 -pg 1 -lvl 3 -x 700 -y 270 -defaultsOSRD +preplace inst xlconstant_0 -pg 1 -lvl 4 -x 960 -y 400 -defaultsOSRD +preplace inst xlslice_0 -pg 1 -lvl 6 -x 1550 -y 220 -defaultsOSRD +preplace netloc compteur_nbits_0_o_val_cpt 1 1 1 NJ 300 +preplace netloc mef_cod_i2s_vsb_0_o_cpt_bit_reset 1 0 3 20 400 NJ 400 580 +preplace netloc mef_cod_i2s_vsb_0_o_bit_enable 1 0 5 10 390 NJ 390 590 340 790J 330 1140 +preplace netloc mux2_0_output 1 4 1 1120 80n +preplace netloc util_vector_logic_0_Res 1 4 1 N 210 +preplace netloc mef_cod_i2s_vsb_0_o_load_left 1 2 2 610 200 N +preplace netloc mef_cod_i2s_vsb_0_o_load_right 1 2 2 600 190 800 +preplace netloc xlconcat_0_dout 1 3 1 790 60n +preplace netloc i_lrc_0_1 1 0 2 NJ 220 260J +preplace netloc input1_0_1 1 0 4 NJ 80 NJ 80 NJ 80 NJ +preplace netloc input2_0_1 1 0 4 NJ 100 NJ 100 NJ 100 NJ +preplace netloc i_reset_0_1 1 0 5 NJ 40 270 360 NJ 360 810J 340 1130 +preplace netloc i_bclk_0_1 1 0 5 0 380 280 370 NJ 370 800J 320 1110 +preplace netloc xlconstant_0_dout 1 4 1 1150 250n +preplace netloc reg_dec_24b_fd_0_o_dat 1 5 1 NJ 220 +preplace netloc xlslice_0_Dout 1 6 1 NJ 220 +levelinfo -pg 1 -20 140 430 700 960 1290 1550 1680 +pagesize -pg 1 -db -bbox -sgen -180 0 1800 460 +" +} +0 |